1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
In recent years, as a material of wiring of a semiconductor device, Cu is used instead of Al in order to decrease wiring resistance and to improve resistance to migration such as electromigration (EM) and stress migration (SM) which can cause defect in wiring.
Unlike AL, Cu is difficult to process by RIE (reactive ion etching), and thus a damascene method is used for forming wiring with Cu, in which a wiring trench and a via hole are formed in a surface of an insulating film in advance, a Cu film is formed on the insulating film so as to fill up the wiring trench and the via hole with Cu, and thereafter an unnecessary portion of the Cu film is removed by chemical mechanical polishing to thereby form the wiring.
As a method of forming a Cu film in the damascene method, electrolytic plating method is widely used. Since formation of a Cu film by this electrolytic plating method is carried out approximately at room temperature, growth of crystal of Cu constituting the Cu film occurs when heat treatment is performed after the Cu film is formed.
However, in the Cu film formed by electrolytic plating method, large amounts of vacancies and impurities exist. Accordingly, when heat treatment is performed in this state, the Cu film shrinks and the vacancies in the Cu film agglomerate at a crystal grain boundary, which may cause formation of a void. When this void is formed in a wiring trench or a via hole, it exists as an initial void in a Cu wiring.
Further, with a large amount of vacancies existing in a Cu wiring, when heat stress is applied thereto for a long period of time, the vacancies agglomerate at a location where the stress concentrates, such as immediately under a via plug to thereby form a void, which causes Stress Induced Voiding (SIV) that is a problem in reliability of wiring.
Incidentally, techniques to form a void diffusion preventing film on a metal wiring film have been disclosed. Here, the void diffusion preventing film is for restricting movement of a void existing in a metal wiring film formed on the void diffusion preventing film to a metal wiring film under the void diffusion preventing film (for example, refer to Japanese Patent Application Laid-open No. 2005-57277).